[PATCH] D97033: [RISCV] Use custom isel for vector indexed load/store intrinsics.

[Craig Topper via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGd056d5decfb5: [RISCV] Use custom isel for vector indexed load/store intrinsics. (authored by craig.topper).

Changed prior to commit:
  https://reviews.llvm.org/D97033?vs=324881&id=325030#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97033/new/

https://reviews.llvm.org/D97033

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td

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