[PATCH] D97035: [AArch64][GlobalISel] Support lowering <1 x i8> arguments and returning

[Amara Emerson via Phabricator via llvm-commits]

aemerson added inline comments.


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Comment at: llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp:389
+                Srcs.push_back(Undef.getReg(0));
+              CurVReg = MIRBuilder.buildBuildVector({NewLLT}, Srcs).getReg(0);
             }
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arsenm wrote:
> I am working on the return complement to 62d946e133f748d4500903c2b80fc456ff409505 which will handle more cases here
Ok I'll remove this part.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97035/new/

https://reviews.llvm.org/D97035