[PATCH] D96910: [RISCV] Add support for fixed vector sign/zero extend from mask types.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 324452.
craig.topper added a comment.

clang-format


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D96910/new/

https://reviews.llvm.org/D96910

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll

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