[PATCH] D96469: [AMDGPU] WIP: use single cache policy operand
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 16 11:31:31 PST 2021
rampitec updated this revision to Diff 324068.
rampitec marked 2 inline comments as done.
rampitec edited the summary of this revision.
rampitec added a comment.
Added buffer instructions. These were more difficult because ret and noret atomics only differ in glc and the rest of the instructions is the same.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D96469/new/
https://reviews.llvm.org/D96469
Files:
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/lib/Target/AMDGPU/BUFInstructions.td
llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
llvm/lib/Target/AMDGPU/FLATInstructions.td
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
llvm/lib/Target/AMDGPU/SIDefines.h
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/lib/Target/AMDGPU/SIInstrInfo.td
llvm/test/MC/AMDGPU/atomic-fadd-insts.s
llvm/test/MC/AMDGPU/cpol-err.s
llvm/test/MC/AMDGPU/flat-gfx10.s
llvm/test/MC/AMDGPU/flat-gfx9.s
llvm/test/MC/AMDGPU/mubuf-gfx10.s
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