[PATCH] D96567: [RISCV] Add support for fixed vector floating point setcc.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 12 09:59:48 PST 2021


craig.topper updated this revision to Diff 323377.
craig.topper added a comment.

-rebase
-Address review comments.
-Remove SDTCisVec when SDTCVecEltisVT is specified.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D96567/new/

https://reviews.llvm.org/D96567

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll

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