[PATCH] D95094: [ShrinkWrap] Enable Shrinkwrapping on 32 and 64 bit AIX, and 64 bit ELF

Sean Fertile via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 12 08:37:36 PST 2021


sfertile added inline comments.


================
Comment at: llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll:28
+;  as well.
+; CHECK-LINUX: mflr
 ;
----------------
This should stay a `CHECK' lable, we expect this instruction on all platforms.


================
Comment at: llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll:87
 ; Make sure we save the link register
-; CHECK: mflr {{[0-9]+}}
+; CHECK-LINUX: mflr {{[0-9]+}}
 ;
----------------
This should stay a `CHECK' lable, we expect this instruction on all platforms.


================
Comment at: llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll:217
+; Make sure we save the link register
+; CHECK-LINUX: mflr {{[0-9]+}}
 ;
----------------
This should stay a `CHECK' lable, we expect this instruction on all platforms.


================
Comment at: llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll:219
 ;
-; DISABLE: std
-; DISABLE-NEXT: std
-; DISABLE: cmplwi 3, 0
-; DISABLE-NEXT: beq 0, .[[ELSE_LABEL:LBB[0-9_]+]]
+; DISABLE-LINUX: std
+; DISABLE-LINUX-NEXT: std
----------------
We expect the same instructions on both 64-bit targets, we just schedule them slightly differently between Linux and Aix. we should be able to common them up by checking more instructions and using check dag. Something like:

```
; CHECK: mflr {{[0-9]+}}

; DISABLE64-DAG: std {{[0-9]+}}
; DISABLE64-DAG: std {{[0-9]+}}
; DISABLE64-DAG: std {{[0-9]+}}
; DISABLE64-DAG: stdu 1,
; DISABLE64-DAG: cmplwi 3, 0

; DISABLE32-DAG: stw {{[0-9]+}}
; DISABLE32-DAG: stw {{[0-9]+}}
; DISABLE32-DAG: stw {{[0-9]+}}
; DISABLE32-DAG: stwu 1,
; DISABLE32-DAG: cmplwi 3, 0

; DISABLE-NEXT: beq 0, {{.*}}[[ELSE_LABEL:BB[0-9_]+]]
```


================
Comment at: llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll:414
 ; DISABLE: cmplwi 3, 0
-; DISABLE-NEXT: std 14, -[[STACK_OFFSET:[0-9]+]](1) # 8-byte Folded Spill
-; DISABLE-NEXT: beq 0, .[[ELSE_LABEL:LBB[0-9_]+]]
+; DISABLE-LINUX-NEXT: std 14, -[[STACK_OFFSET:[0-9]+]](1) # 8-byte Folded Spill
+; DISABLE-64AIX-NEXT: std 14, -[[STACK_OFFSET:[0-9]+]](1) # 8-byte Folded Spill
----------------
This check line and the next should be common for both 64-bit targets.


================
Comment at: llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll:437
 ; CHECK-NEXT: slwi 3, 4, 1
-; DISABLE: ld 14, -[[STACK_OFFSET]](1) # 8-byte Folded Reload
+; DISABLE-LINUX-NEXT: ld 14, -[[STACK_OFFSET]](1) # 8-byte Folded Reload
+; DISABLE-64AIX-NEXT: ld 14, -[[STACK_OFFSET]](1) # 8-byte Folded Reload
----------------
This check line and the next should be common for both 64-bit targets.


================
Comment at: llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll:549
 ;
-; CHECK-NEXT: blr
+; CHECK-LINUX-NEXT: blr
 ;
----------------
`CHECK-LINUX-NEXT` -> `CHECK-NEXT`


================
Comment at: llvm/test/CodeGen/PowerPC/ppc-shrink-wrapping.ll:553
 ;
-; ENABLE: mflr {{[0-9]+}}
+; ENABLE-LINUX: mflr {{[0-9]+}}
 ;
----------------
`ENABLE-LINUX` -> `ENABLE`


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95094/new/

https://reviews.llvm.org/D95094



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