[PATCH] D96468: [RISCV] Add support loads, stores, and splats of vXi1 fixed vectors.

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck accepted this revision.
frasercrmck added a comment.
This revision is now accepted and ready to land.

LGTM. I'm a little surprised by this possible requirement to zero the bytes though, unless I'm not understanding the exact conditions. Are you able to find a testcase?


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D96468