[PATCH] D96469: [AMDGPU] WIP: use single cache policy operand

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 10 16:53:32 PST 2021


rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp:4876
+  // since parseOptionalOperand just consumed all of the individual bits.
+  if (ResTy == MatchOperand_Success && Mnemonic.startswith("scratch_")) {
+    unsigned CPPos = 0;
----------------
arsenm wrote:
> Don't see why this needs to check the mnemonic, but I guess that's part of the temporary hack
Yes, it is hack to only change small number of instructions for now.


================
Comment at: llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp:6835
   {"slc",     AMDGPUOperand::ImmTySLC, true, nullptr},
+  {"cache_policy", AMDGPUOperand::ImmTyCachePolicy, false, nullptr},
   {"swz",     AMDGPUOperand::ImmTySWZ, true, nullptr},
----------------
arsenm wrote:
> i don't think anything with cache_policy in the string should be accepted, should have test to make sure
It does not, this operand type is skipped during parsing. I just need the table to have all types.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D96469/new/

https://reviews.llvm.org/D96469



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