[PATCH] D86878: [AMDGPU] Fix a miscompile with S_ADD/S_SUB

[Piotr Sobczak via Phabricator via llvm-commits]

piotr added a comment.

This is the intended patch, no need to change AMDGPUISelDAGToDAG.cpp in the most recent version. Here, due to the updated check in isBoolSGPR the problematic combines that would strip zext will not happen (see SITargetLowering::performAddCombine/performSubCombine). This is similar to the very first approach I put up for a review.



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Comment at: llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll:1
+; RUN: llc -march=amdgcn -start-before=amdgpu-isel  -stop-after=amdgpu-isel -mtriple=amdgcn--amdpal -verify-machineinstrs < %s | FileCheck %s
+
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arsenm wrote:
> Skipping all the IR passes and going straight to the isel is really weird (and I don't think actually works in general). Is there a need to skip the IR passes here?
> 
> Can you also stop after SIFixSGPRCopies (or finalizeisel) instead?
Sure, will update the test.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D86878/new/

https://reviews.llvm.org/D86878