[PATCH] D86878: [AMDGPU] Fix a miscompile with S_ADD/S_SUB

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

I think you only posted a partial patch for the latest revision



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Comment at: llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll:1
+; RUN: llc -march=amdgcn -start-before=amdgpu-isel  -stop-after=amdgpu-isel -mtriple=amdgcn--amdpal -verify-machineinstrs < %s | FileCheck %s
+
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Skipping all the IR passes and going straight to the isel is really weird (and I don't think actually works in general). Is there a need to skip the IR passes here?

Can you also stop after SIFixSGPRCopies (or finalizeisel) instead?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D86878/new/

https://reviews.llvm.org/D86878