[PATCH] D95086: [DAGCombiner] Transform (zext (select c, load1, load2)) -> (select c, zextload1, zextload2)

[Guozhi Wei via Phabricator via llvm-commits]

Carrot updated this revision to Diff 322847.
Carrot added a comment.

ANY_EXTEND of SEXTLOAD/ZEXTLOAD should not be allowed.
In theory if both loads have same SEXTLOAD/ZEXTLOAD, we can change ExpOpcode to corresponding SIGN_EXTEND/ZERO_EXTEND, but it will make the code more complex, and this case should be extremely rare.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95086/new/

https://reviews.llvm.org/D95086

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/X86/select-ext.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D95086.322847.patch
Type: text/x-patch
Size: 9700 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210210/83241d52/attachment.bin>