[PATCH] D95551: [ARM] One-off identity shuffle

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

Thanks for talking a look



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Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:8197
       }
-      SDValue BitCast = DAG.getBitcast(MVT::v4i32, Input);
-      Parts[Part] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, BitCast,
+      SDValue BitCast = DAG.getBitcast(MVT::v4f32, Input);
+      Parts[Part] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, BitCast,
----------------
SjoerdMeijer wrote:
> Why are we changing this into v4f32?
A v4f32 is a more natural type for lane moves, which is what this is essentially doing. We are moving s registers around, with are naturally f32's.


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  https://reviews.llvm.org/D95551/new/

https://reviews.llvm.org/D95551