[PATCH] D96122: [GlobalISel] Start using vectors in GISelKnownBits
Petar Avramovic via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 5 04:56:30 PST 2021
Petar.Avramovic created this revision.
Petar.Avramovic added reviewers: foad, arsenm, aemerson, paquette.
Herald added subscribers: kerbowa, hiraditya, rovka, nhaehnle, jvesely.
Petar.Avramovic requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.
For vectors we consider bit as knows if it same for all demanded vector
elements (all elements by default). KnownBits BitWidth for vector type
is size of vector element. Add support for G_BUILD_VECTOR.
This allows combines of urem_pow2_to_mask in pre-legalizer combiner.
https://reviews.llvm.org/D96122
Files:
llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
llvm/test/CodeGen/AMDGPU/GlobalISel/combine-urem-pow-2.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D96122.321712.patch
Type: text/x-patch
Size: 20936 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210205/7bbafe67/attachment.bin>
More information about the llvm-commits
mailing list