[PATCH] D96117: [AMDGPU][MC] Corrected error position for invalid dim modifiers

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

dp created this revision.
dp added reviewers: foad, rampitec.
Herald added subscribers: kerbowa, jfb, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl, arsenm.
dp requested review of this revision.
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Error position for an invalid dim modifier may be reported incorrectly.
See bug 49054 <https://bugs.llvm.org/show_bug.cgi?id=49054>.


https://reviews.llvm.org/D96117

Files:
  llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
  llvm/test/MC/AMDGPU/gfx10_asm_mimg_err.s
  llvm/test/MC/AMDGPU/gfx10_err_pos.s


Index: llvm/test/MC/AMDGPU/gfx10_err_pos.s
===================================================================
--- llvm/test/MC/AMDGPU/gfx10_err_pos.s
+++ llvm/test/MC/AMDGPU/gfx10_err_pos.s
@@ -525,21 +525,11 @@
 //==============================================================================
 // failed parsing operand.
 
-image_load v[0:1], v0, s[0:7] dmask:0x9 dim:1 D
-// CHECK: error: failed parsing operand.
-// CHECK-NEXT:{{^}}image_load v[0:1], v0, s[0:7] dmask:0x9 dim:1 D
-// CHECK-NEXT:{{^}}                                              ^
-
 v_ceil_f16 v0, abs(neg(1))
 // CHECK: error: failed parsing operand.
 // CHECK-NEXT:{{^}}v_ceil_f16 v0, abs(neg(1))
 // CHECK-NEXT:{{^}}                   ^
 
-image_atomic_xor v4, v32, s[96:103] dmask:0x1 dim:, glc
-// CHECK: error: failed parsing operand.
-// CHECK-NEXT:{{^}}image_atomic_xor v4, v32, s[96:103] dmask:0x1 dim:, glc
-// CHECK-NEXT:{{^}}                                                  ^
-
 //==============================================================================
 // first register index should not exceed second index
 
@@ -646,6 +636,24 @@
 // CHECK-NEXT:{{^}}s_waitcnt vmcnt(0) & expcnt(0) x(0)
 // CHECK-NEXT:{{^}}                               ^
 
+//==============================================================================
+// invalid dim value
+
+image_load v[0:1], v0, s[0:7] dmask:0x9 dim:1 D
+// CHECK: error: Invalid dim value
+// CHECK-NEXT:{{^}}image_load v[0:1], v0, s[0:7] dmask:0x9 dim:1 D
+// CHECK-NEXT:{{^}}                                            ^
+
+image_atomic_xor v4, v32, s[96:103] dmask:0x1 dim:, glc
+// CHECK: error: Invalid dim value
+// CHECK-NEXT:{{^}}image_atomic_xor v4, v32, s[96:103] dmask:0x1 dim:, glc
+// CHECK-NEXT:{{^}}                                                  ^
+
+image_load v[0:1], v0, s[0:7] dmask:0x9 dim:7D
+// CHECK: error: Invalid dim value
+// CHECK-NEXT:{{^}}image_load v[0:1], v0, s[0:7] dmask:0x9 dim:7D
+// CHECK-NEXT:{{^}}                                            ^
+
 //==============================================================================
 // invalid dst_sel value
 
Index: llvm/test/MC/AMDGPU/gfx10_asm_mimg_err.s
===================================================================
--- llvm/test/MC/AMDGPU/gfx10_asm_mimg_err.s
+++ llvm/test/MC/AMDGPU/gfx10_asm_mimg_err.s
@@ -35,4 +35,4 @@
 // NOGFX10: :[[@LINE-1]]:{{[0-9]+}}: error: image address size does not match dim and a16
 
 image_load v[0:1], v0, s[0:7] dmask:0x9 dim:1 D
-// NOGFX10: :[[@LINE-1]]:{{[0-9]+}}: error: failed parsing operand
+// NOGFX10: :[[@LINE-1]]:{{[0-9]+}}: error: Invalid dim value
Index: llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -7184,15 +7184,20 @@
   // We want to allow "dim:1D" etc., but the initial 1 is tokenized as an
   // integer.
   std::string Token;
+  SMLoc StartLoc = getLoc();
   if (isToken(AsmToken::Integer)) {
     SMLoc Loc = getToken().getEndLoc();
     Token = std::string(getTokenStr());
     lex();
-    if (getLoc() != Loc)
+    if (getLoc() != Loc) {
+      Error(StartLoc, "Invalid dim value");
       return MatchOperand_ParseFail;
+    }
   }
-  if (!isToken(AsmToken::Identifier))
+  if (!isToken(AsmToken::Identifier)) {
+    Error(StartLoc, "Invalid dim value");
     return MatchOperand_ParseFail;
+  }
   Token += getTokenStr();
 
   StringRef DimId = Token;
@@ -7200,8 +7205,10 @@
     DimId = DimId.substr(12);
 
   const AMDGPU::MIMGDimInfo *DimInfo = AMDGPU::getMIMGDimInfoByAsmSuffix(DimId);
-  if (!DimInfo)
+  if (!DimInfo) {
+    Error(StartLoc, "Invalid dim value");
     return MatchOperand_ParseFail;
+  }
 
   lex();
 


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