[PATCH] D92071: [PowerPC] support register pressure reduction in machine combiner.

[ChenZheng via Phabricator via llvm-commits]

shchenz marked 3 inline comments as done.
shchenz added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:347
+// Try to reassociate FMA with FSUB and a constant like below:
+// C is a floatint point const.
+//
----------------
foad wrote:
> Typo "floating".
Thanks for pointing this out. NFC patch b0869a7d72f121b77d48d6496c6c3f00dd4731da fix this.


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Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:362
+//   D = FMA   A,  X,  C
+//
+//  Before the transformation, A must be assigned with different hardware
----------------
foad wrote:
> Is it true that these patterns only improve register pressure if X and Y are "live out" of the pattern? Otherwise A could be allocated the same register as X or Y and there would be no increase.
One condition for this transformation is `FMA` is the only user of `FSUB`, which means we can delete the original `FSUB` to save its definition, the original `A`. After the transformation, A must be assigned with the same register with `B` and `D`


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Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:365
+//  register with D. After the transformation, A and D must be assigned with
+//  same hardware register due to TIE attricute of FMA instructions.
+//
----------------
foad wrote:
> Typo "attribute".
fixed in commit b0869a7d72f121b77d48d6496c6c3f00dd4731da


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https://reviews.llvm.org/D92071