[PATCH] D92071: [PowerPC] support register pressure reduction in machine combiner.

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:347
+// Try to reassociate FMA with FSUB and a constant like below:
+// C is a floatint point const.
+//
----------------
Typo "floating".


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Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:362
+//   D = FMA   A,  X,  C
+//
+//  Before the transformation, A must be assigned with different hardware
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Is it true that these patterns only improve register pressure if X and Y are "live out" of the pattern? Otherwise A could be allocated the same register as X or Y and there would be no increase.


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Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:365
+//  register with D. After the transformation, A and D must be assigned with
+//  same hardware register due to TIE attricute of FMA instructions.
+//
----------------
Typo "attribute".


Repository:
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  https://reviews.llvm.org/D92071/new/

https://reviews.llvm.org/D92071