[PATCH] D95890: [RISCV] Alternate attempt to optimize sign-extended EXTRACT_VECTOR_ELT nodes.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 2 12:43:00 PST 2021
craig.topper added inline comments.
================
Comment at: llvm/test/CodeGen/Mips/atomic.ll:4300
; MIPS32EB-NEXT: jr $ra
; MIPS32EB-NEXT: sra $2, $1, 24
entry:
----------------
jrtc27 wrote:
> Strange that this one didn't change
AtomicCmpSwap8 uses ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS which is expanded by SelectionDAGLegalize::ExpandNode to a sequence that includes an AssertSExt.
AtomicSwap8 just uses ISD::ATOMIC_SWAP and does not go through any expanding. A custom inserter creates ATOMIC_SWAP_I8_POSTRA and then that is expanded by MipsExpandPseudo.cpp. Only after that do the earlier shifts appear.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D95890/new/
https://reviews.llvm.org/D95890
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