[PATCH] D95844: [RISCV] Use a ComplexPattern to merge isel patterns for vector load/store with GPR and FrameIndex addresses.
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 2 01:28:02 PST 2021
frasercrmck accepted this revision.
frasercrmck added a comment.
This revision is now accepted and ready to land.
LGTM other than that stylistic change.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:859
+ // selected to a register independently.
+ if (auto FIN = dyn_cast<FrameIndexSDNode>(Addr))
+ Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), Subtarget->getXLenVT());
----------------
I think the clang-tidy suggestion here is "correct" LLVM style: `auto *`
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D95844/new/
https://reviews.llvm.org/D95844
More information about the llvm-commits
mailing list