[PATCH] D95690: [LoopVectorize] improve IR fast-math-flags propagation in reductions

Nikita Popov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 1 10:02:21 PST 2021


nikic added a comment.

In D95690#2534048 <https://reviews.llvm.org/D95690#2534048>, @dmgreen wrote:

>> I think there was some problem dealing with the intrinsics in SDAG, but I don't remember the details. cc'ing @aemerson @RKSimon @craig.topper for a better answer.
>
> I think that might have been true originally, but I believe @nikic improved things significantly with the lowering in ISel. I'm not sure if there were other issues, but it seems like it should be viable - and possibly more efficient to do the lowering in ISel. It's only expanding an instruction after all. ISel is pretty good at that kind of thing!

Right. Historically we did not have full legalization support for reductions, but those have been implemented in the meantime, and the last holes were plugged in LLVM 12 (sequential reductions). I think that at this point, there isn't a good reason to use the IR expansion into shuffles anymore. Migrating X86 in particular would probably take some effort though, as I believe it has quite a bit of custom shuffle matching code.


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