[PATCH] D95774: [RISCV] Optimize (srl (and X, 0xffff), C) -> (srli (slli X, 16), 16 + C).
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 1 09:38:13 PST 2021
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG1097ee61bf3e: [RISCV] Optimize (srl (and X, 0xffff), C) -> (srli (slli X, 16), 16 + C). (authored by craig.topper).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D95774/new/
https://reviews.llvm.org/D95774
Files:
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/test/CodeGen/RISCV/alu16.ll
llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll
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