[PATCH] D95690: [LoopVectorize] improve IR fast-math-flags propagation in reductions

Mon Feb 1 09:22:40 PST 2021

spatel added subscribers: RKSimon, aemerson, craig.topper.
spatel added a comment.

In D95690#2533980 <https://reviews.llvm.org/D95690#2533980>, @dmgreen wrote:

>> There's still a bug in ExpandReductions, and we do need to fix that - it's preventing expected vectorization from SLP as noted here:
>> https://llvm.org/PR23116
>
> Why does ISel not lower it more optimally? ExpandReductions never seemed like it should be needed to me.

I think there was some problem dealing with the intrinsics in SDAG, but I don't remember the details. cc'ing @aemerson @RKSimon @craig.topper for a better answer.

>> But yes, since we are still requiring NoNan here, I think we are safe (this patch can't make things worse unless I've missed some loophole in lowering).

> I thought that we haven't been able to vectorizer min/max reductions in the loop vectorizer for a while as the minnum/maxnum intrinsics do not get matched - it's still expecting a icmp/select in the reduction recognition code.

I think that's correct - I managed to get SLP to recognize the intrinsics, but LV still doesn't afaik. That's another step on this path. So the plan will be to get LV to deal with the FP minnum/maxnum, then handle the recent integer min/max intrinsics, then canonicalize to those intrinsics in instcombine.

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https://reviews.llvm.org/D95690