[PATCH] D95705: [RISCV] Add initial support for converting fixed vectors to scalable vectors during lowering to use RVV instructions.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jan 31 19:59:10 PST 2021


craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVSubtarget.cpp:94
+         "Tried to get vector length without V extension support!");
+  assert(RVVVectorBitsMin % 128 == 0 &&
+         "V extension requires vector length in multiples of 128!");
----------------
HsiangKai wrote:
> V has no such requirement or I misunderstood the specification?
Good point. I blindly copied that from AArch64 and was more focused on getting on to the lowering work.

What restrictions should we have here?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95705/new/

https://reviews.llvm.org/D95705



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