[PATCH] D95586: [ARM] permit PC as destination of MOVS

[Renato Golin via Phabricator via llvm-commits]

rengolin added inline comments.


================
Comment at: llvm/test/MC/ARM/lsl-zero-errors.s:157
+
+        movs  pc, r1, lsl r2
+
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psmith wrote:
> I think this is unpredictable as it is the encoding MOV, MOVS (register-shifted register) which does not permit PC as the destination, only MOV, MOVS (register) permits PC as the destination (the encoding allows a rotation, but not shift).
Argh, I missed that! You're right, this is wrong. I wonder if this isn't reuse of table-gen encoding (like we have for others) for the shifted case and the reason LLVM hasn't used it so far?


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  https://reviews.llvm.org/D95586/new/

https://reviews.llvm.org/D95586