[PATCH] D95586: [ARM] permit PC as destination of MOVS

[Renato Golin via Phabricator via llvm-commits]

rengolin added a comment.

My reading of the manual says this change is correct. All the exceptions and deprecations in MOVs and LSL seem to not be in ARM mode with the S flag set and without the PC in Rm (source register).

But it's been a while since I reviewed ARM ASM code especially those around so many exceptions. So I'd like people that are still actively looking at ARM code to review this (@psmith, @rovka).



================
Comment at: llvm/test/MC/Disassembler/ARM/unpredictable-LSL-regform.txt:12
 
-# CHECK: warning: potentially undefined instruction encoding
+# CHECK: lsl     pc, r2, r1
 0x12 0xf1 0xa0 0xe1
----------------
Actually, this is an unpredictable test. so we either change it to add the actual unpredictable instructions or we delete the test altogether.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95586/new/

https://reviews.llvm.org/D95586