[PATCH] D95136: [X86] Fix tile config register spill issue.
LuoYuanke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 29 03:50:20 PST 2021
LuoYuanke added inline comments.
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Comment at: llvm/lib/Target/X86/X86PreTileConfig.cpp:305
+ if (BBVisitedInfo[MBB].IsCallBeforeAMX)
+ S = std::min(S, HasAfterCallAMX);
+
----------------
State HasAfterCallAMX seems useless. I didn't find we check this state anywhere.
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Comment at: llvm/lib/Target/X86/X86PreTileConfig.cpp:313
+ // If BB has AMX, its predecessors don't need to be updated again.
+ if (!BBVisitedInfo[*I].HasAMX)
+ BBVisitedInfo[*I].NeedUpdatePred = true;
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Why if BBVisitedInfo[*I].HasAMX is true, we don't update it? I think when BBVisitedInfo[*I].MaxSucc changes, we need update its predecessor.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D95136/new/
https://reviews.llvm.org/D95136
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