[PATCH] D95659: [RISCV] Initial support of LoopVectorizer for RISC-V Vector.
Roger Ferrer Ibanez via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 29 03:22:20 PST 2021
rogfer01 added a comment.
Hi Kai, are we OK with having a test that goes from IR to assembly in the `Transforms` component?
I'd expect here a vectorized IR test. Then we can add tests those inputs `Codegen` so they generate sensible RVV instructions.
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D95659/new/
https://reviews.llvm.org/D95659
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