[PATCH] D95620: [RISCV] Support scalable-vector integer reduction intrinsics

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1677
+  MVT M1VT = MVT::getScalableVectorVT(VecEltVT, NumElts);
+  SDValue Splat0 = DAG.getSplatVector(
+      M1VT, DL, DAG.getConstant(0, DL, Subtarget.getXLenVT()));
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craig.topper wrote:
> craig.topper wrote:
> > Doesn't this need to be the identify value for the operation not always 0? I think AND would need -1. SMIN would need INT_MAX, SMAX would need INT_MIN, UMAX would need UINT_MAX.
> > Doesn't this need to be the identify value for the operation not always 0? I think AND would need -1. SMIN would need INT_MAX, SMAX would need INT_MIN, UMAX would need UINT_MAX.
> 
> Oops UMAX would need 0, UMIN would need UINT_MAX
Wow, of course they would. Can't believe I missed that. Thanks! Must have been too focused on "add".


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  https://reviews.llvm.org/D95620/new/

https://reviews.llvm.org/D95620