[PATCH] D95489: [AMDGPU] Do not reassign spilled registers

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp:482
+  if (Def && ((Def->isCopy() && Def->getOperand(1).getReg() == PhysReg) ||
+              TII->isSpill(*Def)))
     return false;
----------------
rampitec wrote:
> arsenm wrote:
> > Can you tell if it's a spill from the VirtRegMap instead?
> I don't see how.
Does Register::isStackSlot return true here, or does VRM->getStackSlot() != NO_STACK_SLOT tell you?


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  https://reviews.llvm.org/D95489/new/

https://reviews.llvm.org/D95489