[PATCH] D95563: [RISCV] Add initial support for 128-bit fixed vectors with RVV.
Zakk Chen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 28 06:40:10 PST 2021
khchen added a comment.
Had you consider SVE's minimum vector length approach?
https://reviews.llvm.org/D80385
https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/AArch64/AArch64Subtarget.cpp#L50-L54
maybe giving the variable minimum vector length is more flexible?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D95563/new/
https://reviews.llvm.org/D95563
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