[PATCH] D93694: [MachineLICM][MachineSink] Move SinkIntoLoop from MachineLICM to MachineSink

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer updated this revision to Diff 319390.
SjoerdMeijer added a comment.

Just added a few more test, trying to sink an add instruction: `sink_add`, `store_after_add`, and `aliased_store_after_add`

The last 2 are negative tests, and shouldn't sink things passed stores. The first, `sink_add`, is interesting because it shows that the original sink algorithm, and then loop-sink working one after the other, working "together", which is the good thing to do here. This means that a load instruction from the entry block:

  Sink instr %12:gpr32common = LDRWui %9:gpr64common, 0 :: (load 4 from %ir.read, !tbaa !0)
        into block bb.1.for.body.preheader:

is sunk into the preheader so that the whole chain ends up in the preheader:

  bb.1.for.body.preheader:
      successors: %bb.3(0x80000000)
      %12:gpr32common = LDRWui %9:gpr64common, 0 :: (load 4 from %ir.read, !tbaa !0)
      %14:gpr32sp = ADDWri %12, 42, 0
      %1:gpr32all = COPY %14
      B %bb.3

Which are then all considered for loop sinking (and that will be sunk with follow up patch D94308 <https://reviews.llvm.org/D94308>).


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93694/new/

https://reviews.llvm.org/D93694

Files:
  llvm/lib/CodeGen/MachineLICM.cpp
  llvm/lib/CodeGen/MachineSink.cpp
  llvm/test/CodeGen/AArch64/loop-sink.mir
  llvm/test/CodeGen/X86/sink-cheap-instructions.ll

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