[PATCH] D95432: AMDGPU/GlobalISel: Combine uniform icmp with select

[Petar Avramovic via Phabricator via llvm-commits]

Petar.Avramovic created this revision.
Petar.Avramovic added reviewers: foad, arsenm.
Herald added subscribers: kerbowa, hiraditya, t-tye, tpr, dstuttard, rovka, yaxunl, nhaehnle, jvesely, kzhuravl.
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Match mir pattern 'select zext(trunc(icmp)) ? a : b' where
zext, trunc and icmp are uniform and have no other uses.
On match, move icmp before select. This avoids having to
save content of $scc in temporary location when there are
instructions in between that implicitly define $scc.
Scc save sequence for s2 as temporary location look like this:
s_cselect_b32 s2, 1, 0
s_and_b32 s2, s2, 1
s_cmp_lg_u32 s2, 0


https://reviews.llvm.org/D95432

Files:
  llvm/lib/Target/AMDGPU/AMDGPUCombine.td
  llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
  llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/combine-uniform-icmp-select.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/uniform-icmp-select.ll

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