[PATCH] D95422: [RISCV] Copy isUnneededShiftMask from X86.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
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In d2927f786e877410d90c1e6f0e0c7d99524529c5 <https://reviews.llvm.org/rGd2927f786e877410d90c1e6f0e0c7d99524529c5>, I added patterns
to remove (and X, 31) from sllw/srlw/sraw shift amounts.

There is code in SelectionDAGISel.cpp that knows to use
computeKnownBits to fill in bits of the mask that were removed
by SimplifyDemandedBits based on bits being known zero.

The non-W shift patterns use immbottomxlenset which allows the
mask to have more than log2(xlen) trailing ones, but doesn't
have a call computeKnownBits to fill in bits of the mask that may
have been cleared by SimplifyDemandedBits.

This patch copies code from X86 to handle more than log2(xlen)
bits and have uses computeKnownBits to fill in missing bits before
counting.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D95422

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
  llvm/test/CodeGen/RISCV/atomic-rmw.ll

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