[PATCH] D94465: [RISCV] Frame handling for RISC-V V extension. (2nd. version)

Mon Jan 25 16:47:27 PST 2021

craig.topper added inline comments.

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Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp:237
+
+    // Scalable load/store has no immediate field.
+    if (MFI.getStackID(FrameIndex) == TargetStackID::ScalableVector &&
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HsiangKai wrote:
> jrtc27 wrote:
> > This step doesn't get a number/summary?
> I didn't understand this comment.
There are comments like "1. Get vlenb..." and "2. Calculate address..." and "3. Replace address..." but this step didn't get a similar numbered comment.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94465/new/

https://reviews.llvm.org/D94465