[PATCH] D95404: [RISCV] Adjust RISCVInstrInfoVSDPatterns.td for different pseudo instructions for different FPR.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
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Move the Suffix string into the VTypeInfo class so we don't need a helper class to get to it.

      

Adjust pseudo naming scheme for FPRs to put F16 <https://reviews.llvm.org/F16>/F32 <https://reviews.llvm.org/F32>/F64 <https://reviews.llvm.org/F64> in
place of F in the pseudo instruction name rather than as a suffix.
This avoids special cases like VFMERGE from the original patch.


https://reviews.llvm.org/D95404

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
  llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vsplats-fp.ll

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