[PATCH] D94465: [RISCV] Frame handling for RISC-V V extension. (2nd. version)

Roger Ferrer Ibanez via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jan 24 02:29:32 PST 2021


rogfer01 added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp:198
+        .ChangeToRegister(FrameReg, false, false, FrameRegIsKill);
+    if (!((RISCVVPseudosTable::getPseudoInfo(MI.getOpcode()) != nullptr) &&
+          MI.mayLoadOrStore()))
----------------
I'm not sure whether we won't get some cases where the frame index is fixed but the instruction is actually a RVV load/store.

Something from IR like below (assume the size of the array is correct for the runtime `vscale` value)

```lang=llvm
%array = alloca [64 x double]
%vptr = bitcast [64 x double]* %array to <vscale x 1 x double>*
%v = load <vscale x 1 x double>, <vscale x 1 x double>* %vptr
```


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D94465



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