[PATCH] D95214: [RISCV]A bug when llc -O0 vfmv.f.s.ll
Jessica Clarke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 22 06:59:03 PST 2021
jrtc27 added a comment.
The commit message could do with improving in many respects (all of spelling, grammar, formatting, style and content). Please clearly state what the actual issue is and why this change is correct given the comment that is already there to explain the current behaviour.
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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:3562
// subregister generated by the instruction to the FPR64 base
// register expected by the type in the pattern
!cond(!eq(!cast<string>(fvti.ScalarRegClass),
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So is this comment just wrong? If so update it, if not your problem lies elsewhere.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D95214/new/
https://reviews.llvm.org/D95214
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