[PATCH] D94863: [RISCV] Implement vssseg intrinsics.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 20 10:30:49 PST 2021


craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM



================
Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:529
 
+  // For stride segment store
+  // Input: (value, pointer, offset, vl)
----------------
stride -> strided


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94863/new/

https://reviews.llvm.org/D94863



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