[PATCH] D56387: [DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE

Wed Jan 20 07:12:30 PST 2021

RKSimon added inline comments.

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Comment at: llvm/test/CodeGen/X86/vector-trunc.ll:392-403
+; SSE2-NEXT:    psrad $16, %xmm1
+; SSE2-NEXT:    psrad $16, %xmm0
+; SSE2-NEXT:    packssdw %xmm1, %xmm0
+; SSE2-NEXT:    retq
+;
+; SSSE3-LABEL: trunc8i32_8i16_ashr:
+; SSSE3:       # %bb.0: # %entry
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lebedev.ri wrote:
> lebedev.ri wrote:
> > I'm not very sure it's an improvement
> Looks like for pre-SSE41 we still fail to detect high bits as zeros?
pre-SSE41 we don't have packusdw (I've no idea why this wasn't included in SSE2 with the rest of them...) so we have a fallback to continue to use packssdw

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  https://reviews.llvm.org/D56387/new/

https://reviews.llvm.org/D56387