[PATCH] D94266: [polly][NewPM][test] Fix polly tests under -enable-new-pm

[Arthur Eubanks via Phabricator via llvm-commits]

aeubanks updated this revision to Diff 317655.
aeubanks added a comment.
Herald added a subscriber: jfb.

address comments


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94266/new/

https://reviews.llvm.org/D94266

Files:
  llvm/tools/opt/opt.cpp
  polly/test/ScopInfo/phi_not_grouped_at_top.ll


Index: polly/test/ScopInfo/phi_not_grouped_at_top.ll
===================================================================
--- polly/test/ScopInfo/phi_not_grouped_at_top.ll
+++ polly/test/ScopInfo/phi_not_grouped_at_top.ll
@@ -1,4 +1,4 @@
-; RUN: opt %loadPolly -analyze  < %s
+; RUN: opt %loadPolly -polly-prepare < %s
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 
 declare i32 @funa() align 2
Index: llvm/tools/opt/opt.cpp
===================================================================
--- llvm/tools/opt/opt.cpp
+++ llvm/tools/opt/opt.cpp
@@ -480,30 +480,22 @@
       return false;
 
   std::vector<StringRef> PassNamePrefix = {
-      "x86-",  "xcore-", "wasm-",    "systemz-", "ppc-",   "nvvm-",   "nvptx-",
-      "mips-", "lanai-", "hexagon-", "bpf-",     "avr-",   "thumb2-", "arm-",
-      "si-",   "gcn-",   "amdgpu-",  "aarch64-", "amdgcn-"};
+      "x86-",  "xcore-", "wasm-",    "systemz-", "ppc-",    "nvvm-",   "nvptx-",
+      "mips-", "lanai-", "hexagon-", "bpf-",     "avr-",    "thumb2-", "arm-",
+      "si-",   "gcn-",   "amdgpu-",  "aarch64-", "amdgcn-", "polly-"};
   std::vector<StringRef> PassNameContain = {"ehprepare"};
-  std::vector<StringRef> PassNameExact = {"safe-stack",
-                                          "cost-model",
-                                          "codegenprepare",
-                                          "interleaved-load-combine",
-                                          "unreachableblockelim",
-                                          "verify-safepoint-ir",
-                                          "divergence",
-                                          "atomic-expand",
-                                          "hardware-loops",
-                                          "type-promotion",
-                                          "mve-tail-predication",
-                                          "interleaved-access",
-                                          "global-merge",
-                                          "pre-isel-intrinsic-lowering",
-                                          "expand-reductions",
-                                          "indirectbr-expand",
-                                          "generic-to-nvvm",
-                                          "expandmemcmp",
-                                          "loop-reduce",
-                                          "lower-amx-type"};
+  std::vector<StringRef> PassNameExact = {
+      "safe-stack",           "cost-model",
+      "codegenprepare",       "interleaved-load-combine",
+      "unreachableblockelim", "verify-safepoint-ir",
+      "divergence",           "atomic-expand",
+      "hardware-loops",       "type-promotion",
+      "mve-tail-predication", "interleaved-access",
+      "global-merge",         "pre-isel-intrinsic-lowering",
+      "expand-reductions",    "indirectbr-expand",
+      "generic-to-nvvm",      "expandmemcmp",
+      "loop-reduce",          "lower-amx-type",
+      "polyhedral-info"};
   for (const auto &P : PassNamePrefix)
     if (Pass.startswith(P))
       return true;


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