[PATCH] D94229: [RISCV] Implement vlseg intrinsics.
    Craig Topper via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Mon Jan 18 23:38:06 PST 2021
    
    
  
craig.topper added inline comments.
================
Comment at: llvm/test/CodeGen/RISCV/rvv/vlseg.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv64 -mattr=+d,+experimental-zvlsseg,+experimental-zfh \
----------------
rv32 tests?
Repository:
  rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94229/new/
https://reviews.llvm.org/D94229
    
    
More information about the llvm-commits
mailing list