[PATCH] D94229: [RISCV] Implement vlseg intrinsics.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:481
+  // For unit stride segment load with mask
+  // Input: (maskedof, pointer, mask, vl)
+  class RISCVUSSegLoadMask<int nf>
----------------
maskedof->maskedoff


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94229/new/

https://reviews.llvm.org/D94229