[PATCH] D94903: [RISCV] Implement vlxseg intrinsics.

[Hsiangkai Wang via Phabricator via llvm-commits]

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Define vlxseg intrinsics and pseudo instructions. Lower vlxseg intrinsics to pseudo instructions in RISCVDAGToDAGISel.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D94903

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vlxseg.ll