[PATCH] D94589: [RISCV] Add intrinsics for vector AMO instructions
Zakk Chen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Jan 16 06:37:33 PST 2021
khchen added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:905
+ // Calculate emul = eew * lmul / sew
+ defvar octuple_emul = !sra(!mul(eew, octuple_lmul), shift_amount<sew>.val);
+ if !and(!ge(octuple_emul, 1), !le(octuple_emul, 64)) then {
----------------
Why is this !sra not !srl?
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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:2542
+ // Calculate emul = eew * lmul / sew
+ defvar octuple_emul = !sra(!mul(eew, octuple_lmul), shift_amount<vti.SEW>.val);
+ if !and(!ge(octuple_emul, 1), !le(octuple_emul, 64)) then {
----------------
same here.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D94589/new/
https://reviews.llvm.org/D94589
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