[PATCH] D94763: [RISCV] Implement vlsseg intrinsics.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:474
+  // For stride segment load with mask
+  // Input: (maskedof, pointer, offset, mask, vl)
+  class RISCVSSegLoadMask<int nf>
----------------
maskedof->maskedoff


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:927
+  let Uses = [VL, VTYPE];
+  let VLIndex = 3;
+  let SEWIndex = 4;
----------------
Needs to be rebase to use HasVLOp


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D94763/new/

https://reviews.llvm.org/D94763