[PATCH] D94763: [RISCV] Implement vlsseg intrinsics.

[Hsiangkai Wang via Phabricator via llvm-commits]

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Define vlsseg intrinsics and pseudo instructions. Lower vlsseg intrinsics to pseudo instructions in RISCVDAGToDAGISel.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D94763

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vlsseg.ll

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