[PATCH] D92105: [RISCV] Add pre-emit pass to make more instructions compressible

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVCompressInstrs.cpp:201
+                                        RegImmPair RegImm,
+                                        SmallVector<MachineInstr *, 8> &MIs) {
+  const TargetRegisterInfo *TRI =
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Use SmallVectorImpl so you don't need to repeat the 8 from the caller.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D92105/new/

https://reviews.llvm.org/D92105