[PATCH] D94286: [RISCV] Add a VL output to vleff intrinsics.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll:4
+; RUN:   < %s | FileCheck %s
+declare { <vscale x 1 x double>, i32 } @llvm.riscv.vleff.nxv1f64(
+  <vscale x 1 x double>*,
----------------
I added the missing test cases for double to rv32.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94286/new/

https://reviews.llvm.org/D94286