[PATCH] D94024: [RISCV] Clear isCodeGenOnly flag on VMSGE(U) pseudo instructions. Remove InstAliases that duplicate the asm strings in the pseudos.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D94024#2483898 <https://reviews.llvm.org/D94024#2483898>, @frasercrmck wrote:

> Sorry, haven't felt able to review this as I don't get the original problem well enough. Because it looks to me like the aliases //permitted// matches, e.g. `vmsgeu.vx $vd, $va, $rs1` which wasn't matching because it was unmasked? It's just that the comment says the "alias .. //prevents// matching" which throws me off as that's the opposite of what I thought they were for.

I think the comment referred specifically to the first two aliases. The VMaskOp on the other patterns is allowed to match as either or ", v0.t" as we normally use the same instruction for masked and unmasked. But in this case we only want VMaskOp to match ", v0.t" so we need an explicit match to another instruction for the no mask case to "prevent" the VMaskOp pattern from matching it.

This patch doesn't change how that works. We're just using the strings from the instructions now instead of aliases.


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  https://reviews.llvm.org/D94024/new/

https://reviews.llvm.org/D94024