[PATCH] D94223: [SelectionDAG] Extend immAll(Ones|Zeros)V to handle ISD::SPLAT_VECTOR

Fraser Cormack via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 7 06:40:01 PST 2021


frasercrmck added a comment.

Ah. I've encountered a hiccup when fixing this up so `SPLAT_VECTOR` can be used as a root of `immAllOnesV` and `immAllZerosV`, e.g.

  def : Pat<(mti.Mask immAllOnesV),
            (!cast<Instruction>("PseudoVMSET_M_"#mti.BX) VLMax, mti.SEW)>;

@craig.topper, do you know if it's possible to extend the following code to allow `SPLAT_VECTOR`? My naive attempts are telling me that you can't just add two independent `CheckOpcodeMatcher`s.  I couldn't get `SwitchOpcodeMatcher` or `ScopeMatcher` (which seemed to optimize to `SwitchOpcodeMatcher`) to work. I'm suspecting that it can't place the emission code in the right place when I do that.  We don't need a new kind of OPC, do we?

  // If this is the root of the dag we're matching, we emit a redundant opcode
  // check to ensure that this gets folded into the normal top-level
  // OpcodeSwitch.
  if (N == Pattern.getSrcPattern()) {
    const SDNodeInfo &NI = CGP.getSDNodeInfo(CGP.getSDNodeNamed("build_vector"));
    AddMatcher(new CheckOpcodeMatcher(NI));
  }
  return AddMatcher(new CheckImmAllOnesVMatcher());


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94223/new/

https://reviews.llvm.org/D94223



More information about the llvm-commits mailing list