[PATCH] D94168: [RISCV] Add scalable vector icmp ISel patterns

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 6 10:05:33 PST 2021


craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td:232
+// 12.8. Vector Integer Comparison Instructions
+defm "" : VPatIntegerSetCCSDNode_VV_VX_VI<SETEQ,  "PseudoVMSEQ">;
+defm "" : VPatIntegerSetCCSDNode_VV_VX_VI<SETNE,  "PseudoVMSNE">;
----------------
What is the splat for VX/VI is on the LHS?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94168/new/

https://reviews.llvm.org/D94168



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